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5.4.3 Connection when the card uses the Card Detect functionality and the PHYSLP functionality
The circuit is modified when PHYSLP is intended to be used. CDI is connected to an active LVCMOS level output
port on the host controller.
The same restrictions as in the previous section apply.
Based on the above, the following is recommended:
a. CDI will be connected to a host controller output port.
b. CDO will be connected to an input port on the host controller.
c. CDO will be connected to a pull-up resistor on the host. The value of the resistor is calculated so that the
voltage drop across the resistor when the card CDO is connected and CDI is not connected will not exceed
0.4V. The leakage current of the card controller is up to 1 ? A. As an example, if the host controller
leakage is also 1 ? A, the pull-up resistor may have a value of up to 200K ? . It is recommended that the
pull-up resistor value will be as high as possible in order to have no effect on the card controller and to
conserve power.
d. During normal operation CDI will, by default, be driven by the host controller to a logic LOW level. This
enables Card Detect functionality, the same as in section 5.4.2 .
When a card supports the PHYSLP functionality, SATA is in Slumber mode, and the host wants to put the
card into PHYSLP mode, the host will
1.
Disregard the CDO input port.
2. Drive CDI to a logic HIGH level
e. In case the Card Detect functionality is required while in the PHYSLP power mode, there is a mechanism
described in the CFast specification. This mechanism consists of pulsing CDI to logic LOW for a period of
less than 2 milliseconds, and sampling CDO while CDI is at logic LOW. The CFast specification specifies
that a CDI pulse going to logic LOW of less than 2 milliseconds will not affect the device PHYSLP state.
See Figure 3.
Figure 3 - CFast connection for Card Detect and PHYSLP functionality
Host Electronics
Vcc
Host
CDI
Output
only
Controller
Input
only
CFast card
CDO
Pull-up
resistor,
100KOhm to
200 KOhm
Input
only
Internal connection
(optional)
Controller
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 0.92
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
F-240_data_sheet_CA-HxBV_Rev092.doc
Page 12 of 56
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